Cache
Coherence in Multi-processor Systems
1. Cache
memory keeps values that have been recently referenced, which improves
performance.
2. Example
states of cache items
a. Modified
it has been modified since its last load from the next lower level of memory
b. Exclusive
the value in this cell has not been modified and no other processor has this
value in its cache
c. Shared
the value in this cell is valid and several other processors may have a valid
value as well
d. Invalid
the value of this cell has been chanced by another processor
3. Rules
of modification of a cell
a. If
all processors that have a shared variable that is only being read, no conflict
occurs.
b. If
a processor modifies a shared variable, it must notify all other caches that
this shared variable is now invalid.
c. If
a cell is invalid and a read occurs, it must be fetched from lower level
memory
4. Cache
must be managed to maximize reference to valid cache values.